target_info.h

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#ifndef TARGET_INFO_H
#define TARGET_INFO_H
 
#include <stdbool.h>
#include <stdint.h>
#include "list.h"
#include "program.h"


typedef int32_t t_regInt;

#define TARGET_NAME "RISC-V_RV32IM"

#define TARGET_PTR_GRANULARITY 1

#define TARGET_REG_ZERO_IS_CONST true

#define NUM_GP_REGS 23

#define NUM_SPILL_REGS 3

enum {
  REG_ZERO = 0,
  REG_RA,
  REG_SP,
  REG_GP,
  REG_TP,
  REG_T0,
  REG_T1,
  REG_T2,
  REG_S0,
  REG_S1,
  REG_A0,
  REG_A1,
  REG_A2,
  REG_A3,
  REG_A4,
  REG_A5,
  REG_A6,
  REG_A7,
  REG_S2,
  REG_S3,
  REG_S4,
  REG_S5,
  REG_S6,
  REG_S7,
  REG_S8,
  REG_S9,
  REG_S10,
  REG_S11,
  REG_T3,
  REG_T4,
  REG_T5,
  REG_T6,
  NUM_REGISTERS
};

enum {
  // Arithmetic
  OPC_ADD,   // rd = rs1 +  rs2
  OPC_SUB,   // rd = rs1 -  rs2
  OPC_AND,   // rd = rs1 &  rs2
  OPC_OR,    // rd = rs1 |  rs2
  OPC_XOR,   // rd = rs1 ^  rs2
  OPC_MUL,   // rd = rs1 *  rs2
  OPC_DIV,   // rd = rs1 /  rs2
  OPC_REM,   // rd = rs1 %  rs2
  OPC_SLL,   // rd = rs1 << rs2
  OPC_SRL,   // rd = rs1 >> rs2            (logical)
  OPC_SRA,   // rd = rs1 >> rs2            (arithmetic)
 
  // Arithmetic with immediate
  OPC_ADDI,  // rd = rs1 +  imm
  OPC_SUBI,  // rd = rs1 -  imm                         (pseudo)
  OPC_ANDI,  // rd = rs1 &  imm
  OPC_ORI,   // rd = rs1 |  imm
  OPC_XORI,  // rd = rs1 ^  imm
  OPC_MULI,  // rd = rs1 *  imm                         (pseudo)
  OPC_DIVI,  // rd = rs1 /  imm                         (pseudo)
  OPC_REMI,  // rd = rs1 %  imm                         (pseudo)
  OPC_SLLI,  // rd = rs1 << imm
  OPC_SRLI,  // rd = rs1 >> imm            (logical)
  OPC_SRAI,  // rd = rs1 >> imm            (arithmetic)
 
  // Comparison
  OPC_SEQ,   // rd = rs1 == rs2                         (pseudo)
  OPC_SNE,   // rd = rs1 != rs2                         (pseudo)
  OPC_SLT,   // rd = rs1 <  rs2            (signed)
  OPC_SLTU,  // rd = rs1 <  rs2            (unsigned)
  OPC_SGE,   // rd = rs1 >= rs2            (signed)     (pseudo)
  OPC_SGEU,  // rd = rs1 >= rs2            (unsigned)   (pseudo)
  OPC_SGT,   // rd = rs1 >  rs2            (signed)     (pseudo)
  OPC_SGTU,  // rd = rs1 >  rs2            (unsigned)   (pseudo)
  OPC_SLE,   // rd = rs1 <= rs2            (signed)     (pseudo)
  OPC_SLEU,  // rd = rs1 <= rs2            (unsigned)   (pseudo)
 
  // Comparison with immediate
  OPC_SEQI,  // rd = rs1 == imm                         (pseudo)
  OPC_SNEI,  // rd = rs1 != imm                         (pseudo)
  OPC_SLTI,  // rd = rs1 <  imm            (signed)
  OPC_SLTIU, // rd = rs1 <  imm            (unsigned)
  OPC_SGEI,  // rd = rs1 >= imm            (signed)     (pseudo)
  OPC_SGEIU, // rd = rs1 >= imm            (unsigned)   (pseudo)
  OPC_SGTI,  // rd = rs1 >  imm            (signed)     (pseudo)
  OPC_SGTIU, // rd = rs1 >  imm            (unsigned)   (pseudo)
  OPC_SLEI,  // rd = rs1 <= imm            (signed)     (pseudo)
  OPC_SLEIU, // rd = rs1 <= imm            (unsigned)   (pseudo)
 
  // Jump/Branch
  OPC_J,     // goto addr;
  OPC_BEQ,   // if (rs1 == rs2) goto addr;
  OPC_BNE,   // if (rs1 == rs2) goto addr;
  OPC_BLT,   // if (rs1 <  rs2) goto addr; (signed)
  OPC_BLTU,  // if (rs1 <  rs2) goto addr; (unsigned)
  OPC_BGE,   // if (rs1 >= rs2) goto addr; (signed)
  OPC_BGEU,  // if (rs1 >= rs2) goto addr; (unsigned)
  OPC_BGT,   // if (rs1 >  rs2) goto addr; (signed)     (pseudo)
  OPC_BGTU,  // if (rs1 >  rs2) goto addr; (unsigned)   (pseudo)
  OPC_BLE,   // if (rs1 <= rs2) goto addr; (signed)     (pseudo)
  OPC_BLEU,  // if (rs1 <= rs2) goto addr; (unsigned)   (pseudo)
 
  // Load/Store
  OPC_LI,    // rd = imm
  OPC_LA,    // rd = addr
  OPC_LW,    // rd = *(int *)(immediate + rs1)
  OPC_SW,    // *(int *)(immediate + rs1) = rs2
  OPC_LW_G,  // rd = *(int *)label                      (pseudo)
  OPC_SW_G,  // *(int *)label = rs2                     (pseudo)
 
  // Other
  OPC_NOP,
  OPC_ECALL,
  OPC_EBREAK,
 
  // Syscall opcodes
  OPC_CALL_EXIT_0,
  OPC_CALL_READ_INT,
  OPC_CALL_PRINT_INT,
  OPC_CALL_PRINT_CHAR
};
 

bool isJumpInstruction(t_instruction *instr);

bool isUnconditionalJump(t_instruction *instr);

bool isExitInstruction(t_instruction *instr);

bool isCallInstruction(t_instruction *instr);
 

t_regID getSpillMachineRegister(int i);

t_listNode *getListOfGenPurposeMachineRegisters(void);

t_listNode *getListOfMachineRegisters(void);

t_listNode *getListOfCallerSaveMachineRegisters(void);

 
#endif